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3.3V 1M x 64-Bit SDRAM Module 3.3V 1M x 72-Bit SDRAM Module 168 pin unbuffered DIMM Modules
HYS64V1000GS-10/-12/-15 HYS72V1000GS-10/-12/-15
Target Information
*
168 Pin JEDEC Standard, Unbuffered 8 Byte Dual-In-Line SDRAM Module 1 bank 1M x 64, 1M x 72 organisation Optimized for byte-write non-parity or ECC applications JEDEC standard Synchronous DRAMs (SDRAM) Performance:
-10 fCK tCK3 tAC3 Clock frequency Clock cycle time Clock access time
CAS latency = 3
* * * *
-12 83 12 11
-15 66 15 13
Units MHz ns ns
100 10 9
* * * * * * * * * * *
Single +3.3V( 0.3V ) power supply Programmable CAS Latency, Burst Length and Wrap Sequence Auto Refresh (CBR) and Self Refresh Decoupling capacitors mounted on substrate All inputs, outputs are LVTTL compatible Serial presence detects Utilizes four / five 1M x 16 SDRAMs in TSOPII-50 packages 4096 refresh cycles every 64 ms Gold contact pad Card Size: 133,35mm x 25,40mm x 3,00 mm This SDRAM product familiy is intended to be fully pin and architecture compatible with the 168 pin Unbuffered DRAM DIMM module family.
Semiconductor Group
1
4.96
HYS64(72)V1000GS-10/-12/-15 1M x 64/72 SDRAM-Module
The HYS64(72)V1000GS-10/-12/-15 are industry standard 168-pin 8-byte Dual in-line Memory Modules (DIMMs) which are organised as 1M x 64 and 1M x 72 high speed memory arrays designed with Synchronous DRAMs (SDRAMs) for non-parity and ECC applications. The DIMMs use four 1M x 16 SDRAMs for the 1M x 64 organisation and an additional SDRAM for the 1M x 72 organisation. Decoupling capacitors are mounted on the PC board. The DIMMs use optional serial presence detects implemented via a serial E2PROM using the two pin I2C protocol. The first 128 bytes are utilized by the DIMM manufacturer and the second 128 bytes are available to the end user. All SIEMENS 168-pin DIMMs provide a high performance, flexible 8-byte interface in a 133,35 mm long footprint. Ordering Information
Type HYS 64V1000GU-50 HYS 64V1000GU-60 HYS 64V1000GU-70 HYS 72V1000GU-50 HYS 72V1000GU-50 HYS 72V1000GU-70 Ordering Code Package L-DIM-168-15 L-DIM-168-15 L-DIM-168-15 L-DIM-168-15 L-DIM-168-15 L-DIM-168-15 Descriptions 100 Mhz 1M x 64 SDRAM module 83 Mhz 1M x 64 SDRAM module 66 MHz 1M x 64 SDRAM module 100 MHz 1M x 72 SDRAM module 83 Mhz 1M x 72 SDRAM module 66 Mhz 1M x 72 SDRAM module
Pin Names
A0-A10 A11 (BS) DQ0 - DQ63 CB0-CB7 RAS CAS WE CKE CLK0 - CLK3 DQMB0 - DQMB7 CS0 - CS3 Vcc Vss SCL SDA N.C. Address Inputs Bank Select Data Input/Output Check Bits (x72 organisation only) Row Address Strobe Column Address Strobe Read / Write Input Clock Enable Clock Input Data Mask Chip Select Power (+3.3 Volt) Ground Clock for Presence Detect Serial Data Out for Presence Detect No Connection
Address Format:
Part Number 1M x 64 1M x 72 HYS 64V1000GS HYS 72V1000GS SDRAM banks 2 2 Rows 11 11 Columns 8 8 Refresh 4k 4k Period 64 ms 64 ms Interval 15,6 s 15,6 s
Semiconductor Group
2
HYS64(72)V1000GS-10/-12/-15 1M x 64/72 SDRAM-Module
Pin Configuration
PIN # 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 Symbol VSS DQ0 DQ1 DQ2 DQ3 VCC DQ4 DQ5 DQ6 DQ7 DQ8 VSS DQ9 DQ10 DQ11 DQ12 DQ13 VCC DQ14 DQ15 NC (CB0) NC (CB1) VSS NC NC VCC WE DQMB0 DQMB1 CS0 DU VSS A0 A2 A4 A6 A8 A10 NC VCC VCC CLK0 PIN # 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 Symbol VSS DU CS2 DQMB2 DQMB3 DU VCC NC NC NC (CB2) NC (CB3) VSS DQ16 DQ17 DQ18 DQ19 VCC DQ20 NC DU NC VSS DQ21 DQ22 DQ23 VSS DQ24 DQ25 DQ26 DQ27 VCC DQ28 DQ29 DQ30 DQ31 VSS CLK2 NC NC SDA SCL VCC PIN # 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 Symbol VSS DQ32 DQ33 DQ34 DQ35 VCC DQ36 DQ37 DQ38 DQ39 DQ40 VSS DQ41 DQ42 DQ43 DQ44 DQ45 VCC DQ46 DQ47 NC (CB4) NC (CB5) VSS NC NC VCC CAS DQMB4 DQMB5 CS1 RAS VSS A1 A3 A5 A7 A9 A11=BS NC VCC CLK1 NC PIN # 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 Symbol VSS CKE CS3 DQMB6 DQMB7 NC VCC NC NC CB6 CB7 VSS DQ48 DQ49 DQ50 DQ51 VCC DQ52 NC DU NC VSS DQ53 DQ54 DQ55 VSS DQ56 DQ57 DQ58 DQ59 VCC DQ60 DQ61 DQ62 DQ63 VSS CLK3 NC SA0 SA1 SA2 VCC
Note : Pinnames in brackets are for the x72 ECC versions
Semiconductor Group
3
HYS64(72)V1000GS-10/-12/-15 1M x 64/72 SDRAM-Module
WE CS0 CS WE DQMB0 DQ0-DQ7 DQMB1 DQ8-DQ15 LDQM DQ0-DQ7 UDQM DQ8-DQ15 D0 CS2 CS WE DQMB2 DQ16-DQ23 DQMB3 DQ24-DQ31 LDQM DQ0-DQ7 UDQM DQ8-DQ15 D1 E2 PROM (256wordx8bit) D0 - D3 C1-C4 VSS RAS CAS CKE CLK0 D0 - D3 D0 - D3 D0 - D3 D0, D2 D1,D3 note: all resistors are 18 Ohms D0 - D3 SA0 SA1 SA2 SA0 SA1 SA2 DQMB6 DQ48-DQ55 DQMB7 DQ56-DQ63 LDQM DQ0-DQ7 UDQM DQ8-DQ15 D3 CS WE DQMB4 DQ32-DQ39 DQMB5 DQ40-DQ47 LDQM DQ0-DQ7 UDQM DQ8-DQ15 D2 CS WE
A0-A10,BS VCC
D0 - D3
SCL SDA
Block Diagram for 1M x 64 SDRAM DIMM module
Semiconductor Group
4
HYS64(72)V1000GS-10/-12/-15 1M x 64/72 SDRAM-Module
WE CS0 CS WE DQMB0 DQ0-DQ7 DQMB1 DQ8-DQ15 LDQM DQ0-DQ7 UDQM DQ8-DQ15 D0 DQMB4 DQ32-DQ39 DQMB5 DQ40-DQ47 LDQM DQ0-DQ7 UDQM DQ8-DQ15 D2 CS WE
CS WE LDQM CB0-CB3 DQ4-DQ7 1/4 D4 CB4-CB7
CS WE UDQM DQ8-DQ11 1/4 D4
CS2 CS WE DQMB2 DQ16-DQ23 DQMB3 DQ24-DQ31 LDQM DQ0-DQ7 DQMB6 DQ48-DQ55 DQMB7 DQ56-DQ63 D1 A0-A10,BS VCC C1-C5 VSS RAS CAS CKE CLK0 D0 - D4 D0 - D4 D0 - D4 D0, D2,D4 D1,D3 note: all resistors are 18 Ohms D0 - D4 D0 - D3 D0 - D4 LDQM DQ0-DQ7 UDQM DQ8-DQ15 D3 E2PROM (256wordx8bit) SA0 SA1 SA2 SA0 SA1 SA2 CS WE
UDQM DQ8-DQ15
SCL SDA
Block DIagram for 1M x 72 SDRAM - DIMM module
Semiconductor Group
5
HYS64(72)V1000GS-10/-12/-15 1M x 64/72 SDRAM-Module
DC Characteristics TA = 0 to 70 C; VSS = 0 V; VDD,VDDQ = 3.3 V 0.3 V Parameter Symbol Limit Values min. Input high voltage Input low voltage Output high voltage (IOUT = - 2.0 mA) Output low voltage (IOUT = 2.0 mA) Input leakage current, any input (0 V < VIN < 3.6 V, all other inputs = 0 V) Output leakage current (DQ is disabled, 0 V < VOUT < VCC) max. Vcc+0.3 0.8 - 0.4 10 10 V V V V A A Unit
VIH VIL VOH VOL II(L) IO(L)
2.0 - 0.5 2.4 - - 10 - 10
Standby and Refresh Currents (Ta = 0 to 70oC, VCC = 3.3V 0.3V) Parameter Symbol Test Condition
Speed Sort Note
X64 12 8 48 24
X72 15 10 60 30 mA mA mA mA
Precharged Standby Current in Power Down Mode Precharged Standby Current in Nonpower Down Mode Active Standby Current in Power Down Mode Active Standby Current in Nonpower Down Mode Refresh Current
Icc1P Icc1PS Icc1N Icc1NS
CKE=VIH(min), tCK=15ns Input Change in every 30ns CKE=>VIH(min), tCK=Infinity No Input Change CKE=VIH(min), tCK=15ns Input Change in every 30ns CKE=>VIH(min),tCK=Infinity No Input Change tRC=>tRC(min) CAS Latency = 3 CKE=<0,2V tRC=tRC(min), tck>tck,min Io = 0mA CAS Latency=3,Burst = 4 -10 -12 -15 -10 -12 -15
Icc2P Icc2PS Icc2N Icc2NS Icc3
12 8 64 40 500 440 360 8 560 500 400
15 10 80 50 625 550 450 10 700 625 500
mA mA mA mA mA mA mA mA mA mA mA
Self Refresh Current Operating Current
Icc4 Icc5
Semiconductor Group
6
HYS64(72)V1000GS-10/-12/-15 1M x 64/72 SDRAM-Module
Capacitance TA = 0 to 70 C; VDD = 3.3 V 0.3 V, f = 1 MHz Parameter Symbol Limit Values min. Input capacitance (A0 to A11) Input capacitance
(RAS, CAS, WE, CS0, CS2,CLK0, CKE, DQMB0-7)
Unit
max. 55 25 11 8 10 pF pF pF pF pF
CI1 CI2 CIO
Csc Csd
- - - - -
Output capacitance (DQ0-DQ63,CB0-CB7) Input Capacitance (SCL,SA0-2) Input/Output Capacitance AC characteristics and waveforms
For AC characteristics, detailed function description and waveforms see the SDRAM datasheet HYB39S164/8/160T.
Semiconductor Group
7
HYS64(72)V1000GS-10/-12/-15 1M x 64/72 SDRAM-Module
Serial Presence Detect A serial presence detect storage device - E2PROM 34C02 - is assembled onto the module. Information about the module configuration, speed, etc. is written into the E2PROM device during module production using a serial presence detect protocol ( I2C synchronous 2-wire bus)
Byte#
Description
0 1 2 3 4 5 6 7 8 9
Number of SPD bytes Total bytes in Serial PD Memory Type Number of Row Addresses Number of Column Addresses Number of DIMM Banks Module Data Width Module Data Width (cont'd) Module Interface Levels SDRAM Cycle Time
10
SDRAM Access time from Clock Dimm Config (Error Det/Corr.) Refresh Rate/Type SDRAM Module Attributes SDRAM Device Attributes SDRAM Device Attributes Burst Length supported Number of SDRAM banks Supported CAS Latencies CS Latencies WE Latencies
11 12 13 14 15 16 17 18 19 20
SPD Entry Value 128 256 SDRAM 12 8 1 64 72 0 LVTTL 10 ns 12 ns 15 ns 9 ns 11 ns 13 ns none ECC norrmal 15.6s *) *) *) 2 *) *)
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
Hex
1 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 0 0 0
0 0 0 0 0 0 1 1 0 0 0 1 1 0 0 1 0 0 0
0 0 0 0 0 0 0 0 0 0 1 0 1 0 1 0 0 0 0
0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 0 0 0
0 1 0 1 1 0 0 1 0 0 0 0 0 0 0 0 0 0 0
0 0 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0
0 0 0 0 0 1 0 0 0 1 0 0 0 0 0 0 0 0 0
80 08 04 0C 08 01 40 48 00 01 A0 C0 F0 90 B0 D0 00 02 00
1 0 0
0 0 1
0 0 1
0 0 1
1 0 1
1 0 1
1 0 1
1 0 1
01
note : *) not decided yet
Semiconductor Group
8
HYS64(72)V1000GS-10/-12/-15 1M x 64/72 SDRAM-Module
L-DIM-168-15 SDRAM DIMM Module package
133,35 127,35 3,0
1
10
11
40
41
84
42,18 66,68
85
95
96
124
125
168
Detail of Contacts
DM168-15.WMF
1.27
1.0
+/- 0.05
preliminary drawing
Semiconductor Group
9

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